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Debugging on targets for Hitachi h 8/300
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Debugging
on targets for Hitachi H8/300, H8S and H8/300H
gdb
needs to know the following specifications to talk to a Hitachi target.
host$ h8300-hms-gdb prog
GDB is free software and...
(gdb) target remote /dev/ttyb
...
(gdb) load
...
(gdb) run
target interface hostname:
portnumber
You can specify a TCP/IP
connection instead of a serial port, using the syntax hostname:
portnumber(assuming
your board is connected so that this makes sense; for instance, to a serial
line managed by a terminal concentrator).
gdb
also supports set
remotedebug n.
You can see some debugging information about communications with the board
by setting the variable,
remotedebug.
In comparison to the H8/300, the H8S has the following
improvements.
-
Eight 16-bit expanded registers, and one 8-bit control register.
-
Normal mode supports the 64K-byte address space.
-
Advanced mode supports a maximum 16M-byte address space.
-
Addressing modes of bit-manipulation instructions improved.
-
Signed multiply and divide instructions.
-
Two-bit shift instructions.
-
Instructions for saving and restoring multiple registers.
-
A test and set instruction.
-
Basic instructions executing doublespeed.
-
The H8S uses a two-channel on-chip PC break controller (PBC)
for debugging programs with high-performance self-monitoring, without using
an in-circuit emulator.
-
The ROM is connected to the CPU by a 16-bit data bus, enabling
both byte data and word data to be accessed in one state. This makes possible
rapid instruction high-speed processing.
-
The H8S has eight 32-bit general registers, all functionally
alike for both address registers and data registers. When a general register
is used as a data register, it can be accessed as a 32-bit, 16-bit, or
8-bit register.
When the general registers are used as 32-bit registers
or address registers, they use the letters, ER
(ER0 to ER7).
The ER registers
divide into 16-bit general registers designated by the letters, E
(E0 to E7)
and R (R0
to R7).
These registers are functionally equivalent, providing
a maximum 16 6-bit registers.
The E registers
(E0 to E7)
are also referred to as extended registers.
The R registers
divide into 8-bit general registers, using the letters, RH
(R0H to R7H)
and RL (R0L
to R7L). These registers are functionally
equivalent, providing a maximum 16 8-bit registers.
The control registers are the 24-bit program counter
(PC), 8-bit extended control register
(EXR), and 8-bit condition-code
register (CCR).
The H8S supports eight addressing modes. See Addressing
modes. The upper 8 bits of the effective
address are ignored, giving a 16-bit address.
| # |
Addressing Mode |
Symbol |
| 1 |
Register direct |
Rn |
| 2 |
Register indirect |
@ERn |
| 3 |
Register indirect with displacement |
@(d:16,ERn)
@(d:32,ERn) |
| 4 |
Register indirect with post-increment
Register indirect with pre-decrement |
@ERn+
@¯ERn |
| 5 |
Absolute address |
@aa:8
@aa:16
@aa:24
@aa:32 |
| 6 |
Immediate |
#xx:8
#xx:16
#xx:32 |
| 7 |
Program-counter relative |
@(d:8,PC)
@(d:16,PC) |
| 8 |
Memory indirect |
@@aa:8 |
-
H8S initiates exception handling by a reset, a trap instruction,
or an interrupt. Simultaneously generated exceptions are handled in order
of priority. Exceptions originate from various sources. Trap instruction
exception handling is always accepted in the program execution state. Trap
instructions and interrupts are handled as in the following sequence.
1. The program counter (PC),
condition code register (CCR),
a
214
nd extend register (EXR) are pushed
onto the stack.
2. The interrupt mask bits are updated. The T
bit is cleared to 0.
3. A vector address corresponding to the exception source is generated,
and program execution starts from that address.
For a reset exception, use Step 2 and Step
3.
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