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Z8000 Dependent Features

The Z8000 that as supports both members of the Z8000 family: the unsegmented Z8002, with 16-bit addresses, and the segmented Z8001 with 24-bit addresses.

When the assembler is in unsegmented mode (specified with the unsegm directive), an address takes up one word (16 bit) sized register. When the assembler is in segmented mode (specified with the segm directive), a 24-bit address takes up a long (32 bit) register.

See the following documentation for the Z8000 architecture's features and options for the assembler.

Options for Z8000

Syntax for Z8000

Special Characters for Z8000

Register Names for Z8000

Addressing Modes for Z8000

Assembler Directives for Z8000

Opcodes for Z8000

Options for Z8000

as has no additional command-line options for the Zilog Z8000 family.

Syntax for Z8000

The following documentation refers to the syntax for the Z8000.

Special Characters for Z8000

! is the line comment character.

You can use ; instead of a newline to separate statements.

Register Names for Z8000

The Z80 ffb 00 has sixteen 16-bit registers, numbered 0 to 15. You can refer to different sized groups of registers by register number with the prefix, r, for 16-bit registers, rr for 32-bit registers, and rq for 64 bit registers.

You can also refer to the contents of the first eight (of the sixteen 16 bit registers) by bytes. They are named rnh and rnl.

Byte registers

r0l r0h r1h r1l r2h r2l r3h r3l
r4h r4l r5h r5l r6h r6l r7h r7l

Word registers

r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15

Long word registers

rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14

Quad word registers

rq0 rq4 rq8 rq12

Addressing Modes for Z8000

as understands the following addressing modes for the Z8000.

rn
Register direct

@rn
Indirect register

addr
Direct
The 16 bit or 24 bit address (depending on whether the assembler is in segmented or unsegmented mode) of the operand is in the instruction.

address(rn)
Indexed
The 16 or 24 bit address is added to the 16 bit register to produce the final address in memory of the operand.

rn(#imm)
Base Address
The 16 or 24 bit register is added to the 16 bit sign extended immediate displacement to produce the final address in memory of the operand.

rn(rm)
Base Index
The 16 or 24 bit register rn is added to the sign extended 16 bit index register rm to produce the final address in memory of the operand.

#xx
Immediate data
(xx).

Assembler Directives for Z8000

The Z8000 port of as includes these additional assembler fde directives, for compatibility with other Z8000 assemblers. As shown, these do not begin with ‘.’ (unlike the ordinary as directives).

segm
Generates code for the segmented Z8001.

unsegm
Generates code for the unsegmented Z8002.

name
Synonym for .file.

global
Synonym for .global.

wval
Synonym for .word.

lval
Synonym for .long.

bval
Synonym for .byte.

sval
Assemble a string. sval expects one string literal, delimited by single quotes. It assembles each byte of the string into consecutive addresses. You can use the escape sequence %xx (where xx represents a two-digit hexadecimal number) to represent the character whose ASCII value is xx. Use this feature to describe single quote and other characters that may not appear in string literals as themselves. For instance, the C statement, “char *a = "he said \"it’s 50% off\"";” is represented in Z8000 assembly language like the following example shows(with the assembler output in hex at the left).

68652073   sval   ‘he said %22it%27s 50%25 off%22%00’
61696420
22697427
73203530
25206F66
662200

rsect
Synonym for .section.

block
Synonym for .space.

even
Special case of .align; aligns output to even byte boundary.

Opcodes for Z8000

For detailed information on the Z8000 machine instruction set, see Z8000 Technical Manual.

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